Expansion Port

Pin

Description (Table 1)

The Expansion port provides all necessary lines for interfacing to almost any concievable device. Disc Drives, Modems, I/O boards, Joystick interfaces, touch pads and Voice synthesisers all connect to this port.

The reason why the majority of control lines are inverted (I have used underline to represent NOT) is since when the control is enabled, the internal configuration can be kept active.

These control lines need only to be grounded in order to effect them rather than passing some hideous 5 volt signal through them (Which may cause some unmentionable thing to happen!).

If MAP is sent low (Grounded) then an area of memory can be switched out. If used in conjunction with an address that falls between #0000 and #BFFF then that block of memory is switched out, leaving the external memory mapped device to fill in the space. This brings forth a neat way to have a cartridge game running on an ORIC!

Alternatively, with an address between #C000 and #FFFF, then the ROM is switched out, leaving the underlying 16K RAM available for use.

This is the technique used for the DISC system which uses this underlying RAM for its Disc Operating System (DOS, be it SEDORIC or other).

ROMDIS enables an external EPROM to run in place of the 16K ROM when the line is taken low.

RESET will actually reset the 6502 CPU and PSG if sent low.

I/O is an output from the ULA (Uncommitted Logic Array) that goes low whenever a part of PAGE 3 is being accessed.

I/O CONTROL can be used to switch out the internal 6522 by setting the line low.

R/W is an output from the ORIC that tells an external system whether a read or a write has acted upon a set memory address.

IRQ is an input into the ORIC and tells the CPU to act upon an interrupt.

02 is the Phase 2 clock of the CPU. This is the opposite cycle that the CPU gets. It can be used to drive external devices to read the ORICs memory without having to halt the 6502 whilst running.

D0 to D7 are the data lines for data written to a specific address.

Finally, A0 to A15 specify the actual Address that a specific byte (D0-d7) is written to.

1

MAP

2

ROMDIS ROM DISABLE

3

OATA LINE BIT2

4

RESET

5

I/O NOT INPUT/OUTPUT

6

I/O CONTROL

7

R/W READ/ NOT WRITE LINE

8

IRQ INTERRUPT REQUEST

9

DATA LINE BIT2

10

DATA LINE BIT0

11

ADDRESS BUS BIT3

12

DATA LINE BIT1

13

ADDRESS BUS BIT0

14

DATA LINE BIT6

15

ADDRESS BUS BIT1

16

DATA LINE BIT3

17

ADDRESS BUS BIT2

18

DATA LINE BIT4

19

DATA LINE BIT5

20

ADDRESS BUS BIT4

21

ADDRESS BUS BIT5

22

DATA LINE BIT7

23

ADDRESS BUS BIT6

24

ADDRESS BUS BIT15

25

ADDRESS BUS BIT7

26

ADDRESS BUS BIT14

27

ADDRESS BUS BIT8

28

ADDRESS BUS BIT13

29

ADDRESS BUS BIT9

30

ADDRESS BUS BIT12

31

ADDRESS BUS BIT10

32

ADDRESS BUS BIT11

33

+5 VOLTS

34

GROUND (-)